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PE4259
Product Specification
Figure 6. Evaluation Board Schematic
J4
N/A
1
T-line Description
--
Model = CPWG
H = 28 mils
T = 2.1 mils
W = 47 mils
G = 30 mils
Er = 4.4
J7
CNTL
1
J5
N/A
R2
1 K Ohm
U1
PE4259/SC70-6
1
J3
RF2
J1
RFC
1
4
5
6
CTRL
RFC
VDD
RF_2
GND
RF_1
3
2
1
C1
0.5pF
SEEASSY NOTE2
C2
0.5pF
SEEASSY NOTE2
R1
1 K Ohm
General Comments
--
Transmission lines connected to J1, J2, and J3 should
1
J2
RF1
J6
CNTLX/VDD
NOTES:
1. USE PCB PART NUMBER: 101-0162-02.
2. ADD TWO 0.5PF CAPS IN SERIES TO BE SHUNTED ON THE J1 SMA INPUT.
SOLDER C1 SIDE 1 TO THE RF TRACE CLOSE TO THE J1 PIN.
SOLDER C1 SIDE 2 TO C2 SIDE 1.
SOLDER C2 SIDE 2 TO GROUND.
?2005-2012 Peregrine Semiconductor Corp. All rights reserved.
have exactly the same electrical length.
The path from J2 to J3 including the distance through the part
should have the same length as J4 and J5 and be in parallel to
J4 to J5.
102/0218-02
Document No. 70-0134-10 │ UltraCMOS? RFIC Solutions
Page 6 of 11
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
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